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    2,263 fpga 搜到的工作,价格货币为 HKD

    我公司有一个项目, cy7c68013A_128 单片机的软件开发, 细节是用GPIO模仿Jtag烧录两片Xilinx的PROM. (XCF04S, XCF01S). Xilin有比较详细的方案。 见副件。 如果你们承接这类工程, 请你给我一个报价。 我们有硬件平台, 你们需要提供, 1 windows usb 的驱动, 指定等待下载的文件。 Cy7c68013A 的程序,把指定的文件烧录到目标PROM. 启动系统, 读取FPGA内部寄存器,确定烧录成功。

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    looking for an expert in FPGA 6 天 left
    已验证

    Xilinx dev board basic programming

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    We need a code in VHDL or Verilog for Sobel and Canny algorithms

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    Expert must be experienced and familiar with Xilinx FPGA, Vivado, VHDL very well.  Below are the basic requirements are given. Any query/question is highly welcome.  Project Descriptions:   Long term full speed memory test for Xilinx FPGA DDR4@1200Mhz in VHDL.  Delivery on the KCU105 platform. Memory test designed to run for several days gathering memory errors s...

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    Expert must be experienced and familiar with Xilinx FPGA, Vivado, VHDL very well.  Below are the basic requirements are given. Any queries/question is highly welcome.  Project Descriptions:   Long term full speed memory test for Xilinx FPGA DDR4@1200Mhz in VHDL.  Delivery on the KCU105 platform. Memory test designed to run for several days gathering memory errors ...

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    Hi, I need FPGA expert for Altera DE1 Board. I will provide library file, I will share more details in chat. please place bid if you can complete this job. thanks

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    We want to write a professional electronic product development "Jamming system" proposal to a company. The proposal will include the following "but not limited to" :- - Our Company profile - literature review about the product - Product information - Product specifications - Timeline There will be two documents:- - Technical proposal - Commercial proposal The way to...

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    I need VHDL code that is to be created for a digital watch to be implemented on a 7 segment display FPGA board. I need someone to explain to me in detail what is going on in each step of the code, as well as a video of how they are implementing it on the board.

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    We can continue to discuss here FPGA UDP TCP

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    sorry we can continue discuss FPGA UDP TCP here

    $389 (Avg Bid)
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    sorry we can continue here about FPGA udp tcp

    $389 (Avg Bid)
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    I have Fpga card. I need a solution to get a UDP and TCP data

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    embedded developer. 2 天 left
    已验证

    looking for someone having expertise in Stratix V FPGA card UDP and TCP offload. I have Stratix V fpga card. I need a solution to get a UDP and TCP data to host application

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    FPGA expert Required 2 天 left
    已验证

    I have Stratix V fpga card. I need a solution to get a UDP and TCP data to host application defined in IPv4's IGMPv3 – join to specific source and group IP 2. TCP 10G connection: I have 2 ethernet interfaces which I need to put into LACP (IEEE 802.3ad) and setup several VLANs onto it. In Linux it is known as Bonding, also called port trunking or link aggregation. Two server interfaces...

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    Convert matlab / simulink simulation to vhdl for fpga. Requires conversion from floating point to fixed point.

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    For, Hemetology Analyzer , Embedded ,FPGA and Linux [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions]

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    Abstract The purpose of this project is to interface a GPS receiver into an FPGA board to capture the necessary location data and present it on an attached display and make it available to a remote computer via serial interface. It will involve learning about GPS receivers, location data communication format, FPGA programming using Verilog and building interesting embedded circuits. A GPS rece...

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    Dear Zhengang, please find the job offer below, note that I’ll be also supporting you as I wish to understand the process, I mainly need the FPGA Verilog code Abstract The purpose of this project is to interface a GPS receiver into an FPGA board to capture the necessary location data and present it on an attached display and make it available to a remote computer via serial interface. I...

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    I have Stratix V fpga card. I need a solution to get a UDP and TCP data to host application

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    FPGA-based accelerator for Deep Neural Networks Deep neural networks find many uses in pattern recognition applications. However, they are computationally expensive on standard computer architectures. The use of hardware acceleration is a promising approach to providing good performance. The aim of this project is to design a demonstrator for deep neural network implementation o...

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    I need to get 4 miliseconds data from AD9226 12bit ADC using ALTERA EP4CE6E22C8 + HY57V561620FTP-H 256Mbit SDRAM when I push a button B1. When I push second time the button B1, to get another 4 ms of data. When I push another button B2, the data from SDRAM must be sent to a CP2102 TTL-USB adapter at 115200 baud rate, so I can donwload data to PC. The aquisition speed needs to be 65MHz.

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    I have no experience using VHDL. I would appreciate if the design and simulation could be explained to me upon creation. I need to create a "Digital Watch" circuit according to specific guidelines so I can implement it on a DE 10-Lite board. I am looking for someone who has experience using VHDL to implement on Intel DE 10-Lite boards. Deliverables Use the slide switches, sw9 to sw4 ...

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    Xilinx vivado 已经结束 left

    Fpga programming using vivado software

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    High speed FPGA design 已经结束 left

    we looking someone who can design high speed FPGA design

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    fpga crypto bitstreams 已经结束 left

    i need crypto bitstreams created for fpga mining

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    Project is about MATLAB implementation of a signal processing algorithm and it's FPGA implementation

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    加精 加封 保密协议

    I need a VHDL core for Lattice ECP5 FPGA (or other) that will send strings (just generic strings) over Ethernet with VSC8531-02 using RGMII. The interface would be RGMII on one side and RX/TX FIFOs on the other side.

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    fpga bitstream for mining 已经结束 left

    i need someone who has made bitstreams before for different algorithim's also the miner .exe file to go with it.

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    We are seeking cooperation with experienced Electronics Engineers with experience in Digital Signal Processing to perform software porting from Analog Devices BlackFIN BF533 embedded software to generic code. OVERVIEW: The project is to perform minor update on currently obsolete embedded software for Analog Devices BlackFIN BF533 Digital Signal Processors. Parts of the original embedded software ...

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    I need an expert with electrical engineering (power quality) for Hybrid Active Power Filter Fuzzy Logic Based for UPS System; Simulations , Research Article and Hardware Single Phase / Three Phase , 3-wire& 4wire 1- HAPF for UPS system PQ Fuzzy refrence current with PLL and Vdc PID control. 2-HAPF for UPS system PQ Fuzzy refrence current with PLL and Vdc Fuzzy control. 3-HAPF for UPS syst...

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    I need a programmer 已经结束 left

    Basic Requirements Build Linux OS for Xilinx Zynq 7030 FPGA SoC Develop AXI based ADC interface Build Linux driver for ADC interface Develop demo software Capture 2 high speed ADC channels up to 160MHz and 16 medium speed ADC channels up to 5MHz simultaneously Show reconstructed waveform on monitor with/without FFT results Advanced requirements Implement DMA for ADC interface Implement FFT for ADC...

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    fpga bitstrams mining 已经结束 left

    I wanted to have one or two fpga bitstreams created for mining it depends on the board i have and how it's build i could give the model fpga i am going to use if that helps you better decide what to do to make the bitstreams compatible with the particular board or boards i will have.

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    Matrix Multiplication 已经结束 left

    i wanna implement 128x128 and 1024 x1024 vector matrix Multiplication synthesizable code including xdc file for Artix edge 7 FPGA board it will support VIvado 2018.1 above

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    Looking for FPGA expert 已经结束 left

    I am looking for someone having expertise in FPGA, i am looking for someone for long term work relation. People having good experience in FPGA but new to this platform are most welcomed. i will explain the details of task in chat

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    加封 保密协议
    Bit Stream for FPGA Cards 已经结束 left

    I need someone that can write new Bit Streams for FPGA cards that mine Crypto Currency.

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    Good day Ankita, I’m Alessio Cazzaniga, I’m willing to set a startup. I’m currently gathering info on the feasibility of my project. I’d like to create a microcontroller for WiFi network, same principle of the Espressif 8266 and ESP32 but that works also on 5 GHz. Basing on my research it is possibile with FPGA, but I’m currently hiring an expert for further analysis...

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    FPGA programming task 已经结束 left

    I have a board DE0-Nano-S0C. I want to create a dsp system in quartus prime software as mention in diagram

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    We are looking for Smartfusion A2F-Eval Kit experienced engineer for our Inkjet Project. We firstly implement the project using those kit, then we want to get custom design. So this project is proof of concept stage for now, applied with A2F-Eval Kit. A sample illustration is : [登录来查看链接] Our part of the project consists of those steps: 1. Getting the config data : A computer sends config data (...

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    Hi freelancers Looking for electronics engineers having good experience in following modules: • Microcontroller like Arduino, Raspberry Pi, FPGA, AVR, PIC and STM32. • Drivers (GPIO, UART, SPI, I2C, PWM....) • IDEs like Keil MDK V5, ATmel studio and MPLab XC8.

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    I have a lot of works related to different fields of electrical engineering looking for experts in following areas: • Embedded C Programming. • VHDL/Verilog • Microcontroller like Arduino, Raspberry Pi, FPGA, AVR, PIC and STM32. • IDEs like Keil MDK V5, ATmel studio and MPLab XC8. • PLCs / SCADA • PCB Designing-Proteus, Eagle. • Multisim • IOT Technologies...

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    This is an MAC/PC Audio interface, standalone mixer/engine, working prototype. - 4 microphone/Line channels (ANALOG real 1073eq neve style preamp) - 2 Guitar inputs with VST audio plugins capability + Effects loop in/outs - 1 Bass input with VST audio plugin capability + Effects loop in/outs - 4 Midi Channels for VST AUDIO ENGINES (Normally a bass synth, a rhodes, organ, lead synth) - 4 Headphone ...

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    I need to open an image, filter it with gaussian filter, then get the output through VGA Port. I have a Spartan 3E-100 CP132 with me, and I need to run the code over it.

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    I need a ZIP file including: – a report in PDF following an IEEE paper format – a folder with VHDL codes (at least 2 VHDL files are expected) – a TCL script and a file [登录来查看链接] – Use QuestaSim/ModelSim as the simulator tool The primary goal of this job is to report the design and the validation of a 3D printer machine implemented in VHDL. The underlying 3D printer is a ...

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    I need a ZIP file including: – a report in PDF following an IEEE paper format – a folder with VHDL codes (at least 2 VHDL files are expected) – a TCL script and a file [登录来查看链接] – Use QuestaSim/ModelSim as the simulator tool The primary goal of this job is to report the design and the validation of a 3D printer machine implemented in VHDL. The underlying 3D printer is a ...

    $2102 (Avg Bid)
    加精 加急
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    I have various projects with different needs. Some more software focus; others more hardware focused. However, all projects have the end goal of FPGA parallel compute acceleration for imaging and graphics applications. I'd like to start anyone that is interested off with a short term project. Then if a fit is mutually made move on to more short term or a longer term projects. I'm ...

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    I have a spartain 11 fpga board design (eagle .brd) since 2005 that I need to generate a sch file for.

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    It is a serial data splitter from 1 input source to 16 output sink using FPGA with specification as below: * synchronous data transfer * simplex data transfer (from source to sink), using TxD, RxD, TxClock , RxClock * there are 2 modes of clock operation which is selectable using gpio pin : external clock source or internal clock source * data buffer for input and all output channel * preferable t...

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    FaceRecognition on FPGA 已经结束 left

    I want to implement a face recognition algorithm on Xilinx pynq z2 or a zedboard card.

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