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    2,133 fpga 搜到的工作,价格货币为 HKD

    我公司有一个项目, cy7c68013A_128 单片机的软件开发, 细节是用GPIO模仿Jtag烧录两片Xilinx的PROM. (XCF04S, XCF01S). Xilin有比较详细的方案。 见副件。 如果你们承接这类工程, 请你给我一个报价。 我们有硬件平台, 你们需要提供, 1 windows usb 的驱动, 指定等待下载的文件。 Cy7c68013A 的程序,把指定的文件烧录到目标PROM. 启动系统, 读取FPGA内部寄存器,确定烧录成功。

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    I am using Altera DE2-115 FPGA board to configure it using Quartus software 17 lite edition. We have to use QSYS to assign addresses and link the processor, then assign inputs and outputs in VHDL and pin planner in Quartus, and then use NIOS II processor for Eclipse to write a program in C and run the board. I am seeking some help in building this mini thing. I am attaching a pdf file for the tas...

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    I need a verilog code that create a 16 bit "Calculator" that uses the slide switches as binary input, and uses the push-button cross as action triggers. The accumulator value should be displayed on the seven segment display in hexadecimal. the center button should be clear, and the four buttons should be ADD, SUBTRACT, AND and XOR.

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    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

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    Dyumnin Semiconductors is in the ASIC/FPGA design business. We are looking for experienced PCB designers who can take our design sketches and convert it to functional PCB design. Please give references to past similar projects (FPGA+analog+high-speed) We are open for both hourly and fixed price contracts. Please provide your rate card for both in the bid document

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    Implementation of Fractional order Integer/ Derivative Using GL algorithm based VHDL on FPGA. simple code which i need.

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    I require a working code in verilog/VHDL/C for an FIR Filter to be implemented on an Altera FPGA

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    We have a Quartus software license and two Arria 10 boards (Terasic Han Platform). We want to give video input to one of the FPGAs through USB-C port and transmit it to the other board with one or multiple serial lines. At the other board, we want to get this video as output from the USB-C port again. We have XTS-FMC Boards for connection between the two FPGAs. We need a highly experienced FPGA ...

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    About us All-in-one solution for market data, order interface, order management and risk controls – at FPGA network card Level. Support for multiple trading applications using a single interface to the exchange, yet providing individual view of the order books for each application. Many solutions that are currently available either crunch the speed tests or concentrate on functionality...

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    本地
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    I am currently using Altera DE2-115 FPGA board to configure it using Quartus 17 lite edition software and write the code in VHDL. We have to use QSYS, and NIOS II for Eclipse to write a program in C and to run the board. I am seeking some help in building this mini thing.

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    FPGA DESIGN ENGINEER 已经结束 left

    We are seeking 1 FPGA Design Engineer for our new product development. FPGA Design Engineer Responsibilities: • Completing implementation in RTL • Ensuring robust and complete timing constraints • Optimizing FPGA code to balance performance, area, power, complexity and timing • Determining and executing development, integration, bring-up and test plans. • Working closely ...

    $290 / hr (Avg Bid)
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    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

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    FPGA Engineer 已经结束 left

    For a Software Defined Radio module we are looking for a senior FPGA engineer. - Process all received data - Filter data for results - Etcetera To process and filter the data on the modules and possible FPGA within a specific SDR device. You will work with persons out of our team. You solve and test the issues they implement. Budget $800

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    BladeRF specialist is needed that has experience with SDR (Software Defined Radio). We would like to set certain functions in the BladeRF: - Receiver (capture data) - Transmitter (page request) - Process all received data - Filter data for results - Multi bands simultaneously - Software define directional radio/antennas - Software define reach/width radio/antennas - Etcetera Require solution to ...

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    Eye pupil tracking 已经结束 left

    I would like to do project in human eye pupil tracking system for video sequence using Verilog in Xilinx spartan 6 FPGA. Here with attached my equirements Requirements: 1. Find the pupil center coordinates and radius for various eye's. 2. Coordinates should be constant intervals while tracking. 3. Only video sequence to be used.... Not for image. Kindly send me possibility of above …...

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    Program a project 已经结束 left

    I am a worker for a software company. I am currently using Altera DE2-115 FPGA board to configure it using Quartus software. We have to use NIOS II processor, QSYS, and Eclipse to write a program and to run the board. I am seeking some help in building this mini thing.

    $133 / hr (Avg Bid)
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    i need a 8-bit comparator characterizing overdrive, to be implemented on FPGA, using Verilog also I need the constrains file

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    Implement 4 bit ADC on FPGA.

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    FPGA Board Expert 已经结束 left

    An expert on FPGA Board should bid only, showing a sample work will be an advantages

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    I am looking for electronic engineers having expertise in different microcontrollers like FPGA, Raspberry Pi, Arduino, PIC, ESP and many others having expertise in programming. I will share details of projects in chat

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    FPGA/VHDL/Verilog 已经结束 left

    Looking for implementation of a Ethernet Tester, generating and analyzing Ethernet traffic at 1G and 10G. More details on PM. J

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    We need to develop a digital multiplier circuit and we need to test the circuit design, Implement it in software environment and simulate the circuit functionality. This is going to be part of a bigger project (ARM IP Core, DSP CPU) and we may need to compare the circuit functionality with some other recommended multiplier in terms of speed and foot print.

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    mining software fpga 已经结束 left

    we need expierenced partner to build fpga mining software

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    hardware architecture of Variational Mode Decomposition on an FPGA

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    Please read carefully. You need to fix my code. I will sent to you in messages my project. Here is project description: The brightness measurement with help of PMODALS sensor ([登录来查看链接] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([登录来查看链接]) is to be used, which takes over the control. The result of the brightness shoul...

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    FPGA Board 已经结束 left

    An expert on FPGA Board should bid only, showing a sample work will be an advantages

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    Fpga labview programming 已经结束 left

    Need expert labview for fpga control of an instrument

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    FPGA project 已经结束 left

    I am looking for FPGA expert..

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    GPS implementation 已经结束 left

    first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PCB of the board you have. U3 is ...

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    FPGA program in singapore 已经结束 left

    Im looking for personnel to work on FPGA program in Singapore ,must be able to read current program or create an new program as required .Any one interested please contact me

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    build me a CMOS sensor 已经结束 left

    I need a line scan CMOS sensor (pixel size 14 micron X 200 microns) capable of line scan at a rate of 80KHz and output the data through ethernet to Xilinx FPGA.

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    FPGA Electric Engineering 已经结束 left

    Hello, We are looking for a FPGA electric engineer who can help us engineer a FPGA board, customize an existing board. Preferable who can also develop in Python and C to connect the FPGA board with a RaspberryPi, and develop programs on both boards. You will receive project information later.

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    Project for Rajagopal S. 已经结束 left

    Hi Rajagopal S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. The brightness measurement with help of PMODALS sensor ([登录来查看链接] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([登录来查看链接]) is to be used, which takes over the control. The result of the brightness should...

    $1731 (Avg Bid)
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    1 个竞标

    First task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop The second part of the project task is to populate the ADC and final amplifier stages on the PMU PCB, together with power...

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    Research help -- 3 已经结束 left

    Hello, this is the task: "first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PC...

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    Hi. I have a Terasic De1SoC and would like to learn how to use it. I am completely knew and have seen content from a similar project and interested on these topics About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design Implementing various encryption and decrypt algorithms SystemVerilog VMM Methodology OVM Methodology UVM Methodology I have C programming background

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    customization of an SDR 已经结束 left

    We are looking at scanning,capturing and decoding multiple cellular frequencies(European 2G/3G/4G(LTE) bands) with an SDR. Currently using a simple rtl-sdr for this case but seeing as it lacks the frequency range(max 1800mhz) and has very little bandwidth(2.4MHz) we would like to upgrade to a better SDR. The goal is to analyze multiple simultaneous communication channels in real time. We are loo...

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    PCB Design 已经结束 left

    Use the xtal oscillator board that I designed and that works together with the FPGA to read the GPS data and then synchronise the 40 MHZ Voltage controlled Xtal oscillator to the 1 second pulse produced by the GPS. I will provide more details on chat.

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    FPGA expert needed 已经结束 left

    I am looking for an expert in FPGA, its not a simple task, only expert place bids. will share details in chat

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    Need someone who has the PLDa PCIe ipcore license for Xilinx Vivado to help compile a FPGA project. I'll give you the source code. You compile and give me the bit file and compiled project.

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    The test program used for transmited data between DDR4 of FPGA and DDR4 of PC adopted windows 10 or win7 system via PCIe 3.0 x8. A tested result shows that the speed of PCIE3.0 *8 is over 7GB/s , which is tested by xilinx Kcu1500 FPGA board. However, the speed under win7 / win10 is only about 4.5-4.9GB/s. The minimum speed threshold should be 5.5 GB/s. And it will be helpful if the speed...

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    Need example code de-10 已经结束 left

    I need a sample code on DE-10 code for utilizing the FPGA-HPS bridge with more emphasis on hardware acceleration. (C ,VHDL prefferd /Verilog). I am trying to explore the functionality where I can write some data from HPS to the FPGA. let the FPGA process it and HPS read back the result. I need to see some processing happening in FPGA on request from HPS . IT could be as simple as AND impleme...

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    i have projects related to all of these micro-controllers: Raspberry Pi FPGA PIC microcontroller STM microcontroller so looking for experts who can assist me with these projects

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    Scope includes the programing (vhdl) for the measurement and of AC voltage, currents, Power (active, reactive and apparent power) and Power Factor in FPGA (Spartan-6). Interfacing ADC and sensors with FPGA for current and voltage measurements. It also includes the display of measured parameter on LED display which is inbuilt on board). This is the brief requirement, interested people may contact ...

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    I want to make this tool by updating the hardware to a new fpga board, here is source code and some documents about it. [登录来查看链接]:projects:smartlogic [登录来查看链接] [登录来查看链接]

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    More details will be shared via chat

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    9 个竞标

    More details will be shared via chat

    $157 (Avg Bid)
    $157 平均报价
    7 个竞标

    Implementation of Fractional-order function (S^e) on FPGA using VHDL. (I need to fix my code only) I don't want imaginary freelancer, please.

    $807 (Avg Bid)
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    FPGA panel connection 已经结束 left

    PANEL = Artix-7 100t - ERROR: [Labtools 27-2269] Hi, I am facing ERROR: [Labtools 27-2269] after issueing the open_hw_target command. Vivado 2019.1 Windows 10 Connected through micro USB for serial communication. MODE = JTAG Any suggestion as to how can i detect the devide to burn my bitstream for execution? Thanks!!

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