to generate automatic test cases using UML sequence diagram that modeled ATM PIN authentication system. prefer using c# or Java programming language. the tasks will be as following:- 1- generate UML sequence diagram for ATM PIN authentication. 2- generate the parser "XML file" for the sequence. 3- generate code to extract the XML tags that describe
...- language : VHDL - IDE : Quartus Prime Lite Edition - Simulations with ModelSim - mini-project : 0) implement a 1680x1050-60Hz mode VGA controller (operating @ 143Hz pixel clock via PLL) 1) store 280x280 8byte/pixel image to on-chip memory (M9k blocks) 2) read image from on-chip memory (using Altera/Intel's RAM-1Port vhdl IP) 3) output
The main goal of the app is to simulate the collection of the information (Time, velocity, acceleration, position, speed pattern, m...algorithms for each modules of the software. PS : For this work, i need an expert in C++ with scientific strong background especially on math and physics. Also who knows well UML and can make very good design document.
i have attached the document below. And i need this on 21st of october.
...have to be ported to VHDL and be integrated before programming the Xilinx V6 FPGA on the transmitter. Complete hardware and many of the software blocks in VHDL are already built by our team. The requirement is urgent. Entire work to be completed in 2 - 3 weeks. Any freelancer with experience in integrating system level codes in VHDL, basics of digital
It is a two step project, first consists of developing a financial expense system for personal use, developing the designs would include: uml, use case, etc.. The second part is implementing all designs done previously using c# and creating the forms
Snake Game : 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog ...: 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog and not in VHDL
Hi I am looking for software architecture to create software architecture and UML drawings. Thank you , Sarika Gill
This link will take to the description of the Data to be able to complete the project [login to view URL] Also a UML diagram of the project and the 5 classes I need:- CARADT PREDICTORADT TESTER CAR PREDICTOR Let me know if anyone can complete within a day.
Any encryption code (AES/RSA) written in VHDL/Verilog in Quartus II for fpga board stratix IV. Please contact for more details.
This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).
...Gulp, Jenkins, HTML5, Bootstrap, AJAX, Ant; • Working experience with preferably Git or other source code versioning systems; • Working experience with Linux OS; • Knowledge of UML and BPMN would be a serious advantage; • Knowledge of Linux shell commands and scripting would be an advantage; • Working experience and ability to setup and configure the following
...possible move types, e.g. Double Jumps = 5, Single Jumps =3 and Single Moves = 1 for the purpose of putting items in order of highest move possibilities first. Upload your revised UML Diagrams and Source code files. Bonus: Once you have the naive algorithm working, additional credit will be awarded to more sophisticated Best Move algorithms, e.g. detect
Busco profesional para desarrollo de modelamiento de diagramas UML, Feature Models (modelo de caracteristicas), Base de datos relacionales. El proyecto es para modelar un diseño de un negocio empresarial real.
The aim of the project is to design a BIST controller to insert and detect the faults (defect) like Read ...disturbance, Erase disturbance, Program disturbance, SAF, TF, ADF, CFs, TF, NPSF, Retention fault in FLASH memory by using BIST algorithm like March algorithm using verilog or VHDL in Xilinx or Modelsim. Need Simulation waveforms for the same.
. When starting the application, a user can choose whether to (1) log in as a specific student or (2) register as a new student . a. To register as a new student, the user must provide the following student information: i. A unique username ii. A major iii. A seniority level (i.e., freshman, sophomore, junior, senior, or grad) iv. An email address b. The newly added student is immediately created ...
* Should be able to architect the app * Should deliver use case diagram, class diagrams and sequence diagrams and any other UML diagrams * Should design the database with tables, rows and column and optimize * Should design the APIs for client/server communication * Should define the JSON string to be shared between client and server * Implementation
I have a short project to do for an Altera 5M160Z CPLD (160 LE). This board has a 16-bit bus from a MCU and 8 control lines and output to a 10-pin port. What I need is a VHDL project (Quartus) that will implement a custom full duplex parallel to serial design. Development using simulation is fine.
add memory protection into the operating system, This project needs both hardware and software knowledge, you will be creating / implementing OS functions on the PicoBla...hardware and software knowledge, you will be creating / implementing OS functions on the PicoBlaze, programming in assembler. You may also need to modify the hardware using VHDL.
Hello guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attach the image table in the files section. Thank you a lot...
Hello guys I...cache memory). I would comments on the code and the resulting image as deliverables. 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works. Again comments on the code please. P.S.: 8 by 8 vhdl integer divider I attach the image table in the files section. Thank you a lot for your bidding :)
A mobile application for android, IOS to be developed using a log forwarder agent for logstash or similar. The GUI should be creative, not necessarily rich and UML modelling will be discussed. Looking for a enthusiastic developer with innate ability to work on the project.
écrire un code vhdl , pour DE0 nano , permettant de lire la température a partir d'une entrée analogique avec un LM19 et en sortie il faut emmètre des son avec un buzzer ( différent fréquence en fonction de la température )
...them where they want to go. The user will select the destination room/building/level and app will provide a google like GPS service. -You will not be required to create the UML diagram, however provide input on what data will be required -Looking for someone from a engineering/Class diagram/ process design background. (I am willing to do all the
conceptual database design, logic database design, and table implementation in the Oracle DBMS
Hi Neeraj K., I noticed your profile and would like to offer you my project. We can discuss any deta...chat. i need data base design with conceptual database design, logic database design, and table implementation in the Oracle DBMS 1)description of data base 2uml diagram 3) uml?er diagram into relational database schema with fk and cks identifying.