Verilog / VHDL Jobs

Verilog and VHDL are two of the most popular hardware description languages (HDLs) commonly used in the design, synthesis, analysis and verification of digital circuits. A Verilog or VHDL designer specializes in writing code in either of these languages for any integrated circuit applications needed.

Verilog and VHDL are used to describe digital systems ranging from relatively simple logic gates to incredibly complex designs involving multiple integration layers. If you need a new integrated circuit design or want to improve an existing one, hiring a Verilog / VHDL Designer is a great way to get the project done.

Here’s some projects that our expert Verilog / VHDL designer made real:

  • Audio processing for microcontroller environments
  • Design and implementation of digital signal processing pipelines
  • Gate level models for facial recognition
  • Digital signature schemes through Vivado Design Suite
  • First-In-First-Out (FIFO) buffers for data storage
  • Graph convolutional neural networks modules
  • Audio codec music players through FPGA boards
  • Stimulators for stack based microprocessors

As you can see, our team of freelancers have the capability to build any complex integrated circuits. They can develop sophisticated digital systems that make your dreams a reality. From audio processing through microcontrollers, to facial recognition gate level models, our team is able to deliver it all.

So if you’re looking for the perfect Verilog / VHDL Designer, just post your project on and get to work on your dream project today! With our top rated Freelancers, you can be sure that your job is taken care of quickly and exactly how you want it – having some real experts handle your projects!

从11,609个评价中,客户给我们的 Verilog / VHDL Designers 打了4.84,共5星。
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    3 份搜到的工作,货币单位为 HKD

    Composto de 7 segmentos de LEDs que podem ser acionados individualmente. Diagrama de blocos, Linguagem VHDL. Trabalho que visa a programção de um display 7 segmentos, o ponto é: temos os codigos prontos e a maneira como deve ficar o diagrama de blocos. Estamos procurando alguem para nos ajudar na criação do diagrama de bloco para cada programação e no final, juntar cada diagrama/programação em um só sistema, como também temos uma imagem de como devem ficar. Utilizando o programa Quartus II e VHDL. Temos um pdf de passo a passo de cada programação e uma imagem de como cada programação deve ficar o seu diagrama de blocos.

    $1242 (Avg Bid)
    $1242 平均报价
    5 个竞标

    I am looking for an experienced freelancer to help me develop a 32 Channel Digital Logic Analyzer using an Xilinx Spartan-6 FPGA. The goal is to have the system handle a data rate of 1 GHz. Key Responsibilities: - Develop and test the logic analyzer using the Xilinx Spartan-6 FPGA - Ensure the system can handle a data rate of up to 1 GHz Ideal Skills and Experience: - Proven experience in FPGA development - Proficiency in Xilinx Spartan-6 - Knowledge of digital logic and logic analyzers - Ability to work with high data rates - Strong problem-solving and analytical skills - Good communication and team collaboration skills In your application, please highlight your relevant experience in FPGA development, especially with the Xilinx Spartan-6, and any relevant experience with similar high ...

    $4186 (Avg Bid)
    $4186 平均报价
    24 个竞标

    I'm seeking a competent Verilog/VHDL developer to create an image processor for scientific imaging. The primary focus of the processor is noise removal, specifically salt and pepper noise. Key Requirements: - Noise Removal: The processor must effectively remove salt and pepper noise from the input images. This is crucial for the intended application in scientific imaging. - Real-time Processing: The design should ideally support real-time processing for seamless image enhancement. - Deadline: This is an urgent project with a tight 2-3 day deadline. Punctuality is paramount. Ideal Skills and Experience: - Proficiency in Verilog/VHDL: Extensive experience in Verilog/VHDL development is necessary to tackle this project effectively. - Image Processing Background: Prior experience in im...

    $859 (Avg Bid)
    $859 平均报价
    6 个竞标


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