Verilog / VHDL Jobs

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关于Verilog / VHDL
Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. 雇佣Verilog / VHDL Designers

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    14 搜到的工作，价格货币为 HKD
    Finite state machine using Quartus 6 天 left
    已验证

    finite-state synchronous machines mealy and moore machine for given task.

    电气工程 电子 工程 矩阵及数学软件 Verilog / VHDL
    $1214 (Avg Bid)
    $1214 平均报价
    7 个竞标
    立即竞标
    Cuckaroo29s Bitstream and Miner for Xilinx vu33p based board 6 天 left

    Looking for an FPGA developer experienced with cryptocurrency to build the following: Cuckaroo29s bitstream for the SQRL FK33 (vu33p) board. (Constraints below, board will not be provided) Windows CLI miner with licensing system based on device DNAs. (need to be able to sell licenses per device DNA that work with the miner. If no License is found the miner will not work) Also a built in dev fee ...

    C 编程 电子 FPGA 微控制器 Verilog / VHDL
    $40044 (Avg Bid)
    $40044 平均报价
    14 个竞标
    立即竞标
    Work on VHDL Laboratory like Latches, Flip-flops and registers 6 天 left
    已验证

    Need to investigate the latches, flip-flops and the registers in VHDL laboratory work

    C 编程 工程 FPGA LabVIEW Verilog / VHDL
    $543 (Avg Bid)
    $543 平均报价
    4 个竞标
    立即竞标
    Small verilog code work based on VLSI Design 6 天 left

    I want to hire a person who has an experience in solving problems related to verilog in VLSI design(small work though),has to be experienced in handy usage of software like xilinx/[登录来查看链接] for the problem and other info.

    电气工程 工程 FPGA LabVIEW Verilog / VHDL
    $166 (Avg Bid)
    $166 平均报价
    5 个竞标
    立即竞标
    Design a digital clock using verilog nexys 4 fpga 6 天 left

    digital Alarm clock. I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    Arduino 电气工程 电子 微控制器 Verilog / VHDL
    $689 (Avg Bid)
    $689 平均报价
    6 个竞标
    立即竞标
    code for Brushless DC motor controller using msp430 5 天 left

    I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    Arduino 电气工程 电子 微控制器 Verilog / VHDL
    $219 (Avg Bid)
    $219 平均报价
    7 个竞标
    立即竞标
    VHDL- VHSIC (Very High Speed Integrated Circuit) Hardware Description Language 5 天 left
    已验证

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus.

    Analog Electronics 电子 Embedded Systems FPGA Verilog / VHDL
    $164 (Avg Bid)
    $164 平均报价
    1 个竞标
    立即竞标
    Simulating Multiple Gates third installment c + verilog 5 天 left
    已验证

    The first installment of the project dealt with the capability to simulate the actions of four very simple gate types, an INV gate, an AND gate, an OR gate and an XOR (exclusive or) gate. The second installment extended that capability by describing the simple logic gates using Verilog, but the Verilog was restricted to descriptions of circuits which only contained a single gate. For the third ins...

    C 编程 C++编程 FPGA 微控制器 Verilog / VHDL
    $378 (Avg Bid)
    $378 平均报价
    14 个竞标
    立即竞标
    OFDM Waveform Development 5 天 left
    已验证

    Need someone to develop OFDM waveform on AD9361 or any other transceiver and FPGA.

    电气工程 FPGA 矩阵及数学软件 微控制器 Verilog / VHDL
    $8472 (Avg Bid)
    $8472 平均报价
    8 个竞标
    立即竞标
    Digital Logic Project 4 天 left

    hello, please if you can comment out the verilog code and the steps done, so we know how to explain it. also, i need this project to be done in exactly one week from today. thank you

    FPGA Verilog / VHDL
    $423 (Avg Bid)
    $423 平均报价
    6 个竞标
    立即竞标
    HEVC implementation 3 天 left
    已验证

    anyone having knowledge on HEVC can reach out to me

    C 编程 C++编程 工程 矩阵及数学软件 Verilog / VHDL
    $104 / hr (Avg Bid)
    $104 / hr 平均报价
    3 个竞标
    立即竞标
    Design a circuit in Xilinx 3 天 left
    已验证

    Design a circuit in Xilinx that takes these inputs and outputs according to the table below

    电路设计 电气工程 电子 工程 Verilog / VHDL
    $227 (Avg Bid)
    $227 平均报价
    8 个竞标
    立即竞标
    electric engineering 2 天 left

    Need someone know well vhdl ............................. ............................. .............................

    电气工程 Verilog / VHDL
    $258 (Avg Bid)
    $258 平均报价
    14 个竞标
    立即竞标
    linux build for red pitaya 13 小时 left
    已验证

    https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841738/Getting+Started [登录来查看链接] Linux build and application development for simple LED blink project.

    FPGA FPGA Coding Linux Verilog / VHDL
    $1760 (Avg Bid)
    $1760 平均报价
    3 个竞标
    立即竞标
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