Verilog / VHDL Jobs

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关于 Verilog / VHDL
Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. 雇佣 Verilog / VHDL Designers

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    5 份搜到的工作，货币单位为 HKD
    flaoting point adder in fpga help 6 天 left

    ok before we had a paper to review about floating point adder in fpga i already did but there is the furue work of that paper talking about specific topic for improvment if u could help me with it (far and close path algorithms).

    电气工程 电子 工程 FPGA Verilog / VHDL
    $1193 (Avg Bid)
    $1193 平均报价
    10 个竞标
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    Looking an Experienced FPGA Developer for UFS Host device -- 2 5 天 left
    已验证

    using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills required : Verilog , VHDL , C , C++

    C 编程 电子 FPGA 微控制器 Verilog / VHDL
    $36366 (Avg Bid)
    $36366 平均报价
    7 个竞标
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    ESP32 ESP-IDF CODE 4 天 left

    I need code for zero crossing detection, synced with pwm generator with fixed duty cycle but variable frequency in esp-idf. I need it urgently Its a signal generator like square wave or pwm with fixed 50% duty cycle, but its frequency needs to be varied from 500 to 100Khz (might be done using ledc_timer_1_bit) but when there is zero crossing, its signal needs to be stopped so that igbt should'nt conduct at zero crossing,

    电气工程 电子 工程 Verilog / VHDL
    $126 (Avg Bid)
    $126 平均报价
    5 个竞标
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    Integrated circuit design 1 天 left
    已验证

    Verilog/VhDL FPGA Asic Electronics Microcontroller

    电路设计 电气工程 电子 微控制器 Verilog / VHDL
    $746 (Avg Bid)
    $746 平均报价
    14 个竞标
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    Integrated circuit design -- 3 5 小时 left

    the concept, design methodology, architecture, circuit gate & performance (speed), and fabrication techniques for integrated circuits (ICs). The main focus is on design for complementary metal-oxide-semiconductor (CMOS) technology.

    电路设计 电气工程 电子 工程 Verilog / VHDL
    $243 / hr (Avg Bid)
    $243 / hr 平均报价
    5 个竞标
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