A Simulator For Fault Diagnosis of Fanout Free Combinational Circuits

Project Title: A Simulator for Fault Diagnosis of Fan-out Free Combinational Circuit.

Client: [url removed, login to view] K. Pandit (IIT Powai).

Hardware: Pentium based Processors and Electronics Kits (Combinational Circuits mounted on PCB).

Software: Visual C++ 6.0,Windows 98/NT/XP.

Project Description:

The system ensures faster automated diagnosis of combinational circuits for faults. There are various kinds of users like electronic kit testers, students etc. for this system, who will be able to test combinational circuits by just connecting their kit through 24 - pin data cable to the parallel printer port.

Fault in logic circuits are in general assumed to be of only single stuck-at nature either 1 or 0. However in VLSI devices a local detect may create multiple instead of single stuck-at faults. There are many algorithms developed to generate test sets for single stuck-at faults, which also detect all multiple stuck-at faults in fan-out free circuits. The fan-out free circuit can be any combination of AND, OR, NOT, NAND, and NOR gates. The Simulator reads the information of the circuit layout drawn on the user-interface screen and prepares the test data along with system output for each node of the logic gates and sends it to the component connected through parallel port (printer port) and collects the output through the port. The Simulator compares the system output with the component©s output and if faults any on that node of the component is indicated on the user-interface screen.

C 编程 Linux Visual Basic

项目ID： #2609

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