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Deadline: Sunday 21st October *Assignment Overview* The overall aim of your assignment is to build a software based implementation of a Central Processing Unit (CPU). Such an implementation should be capable of simulating the execution of machine code instructions. The implementation should be written in the ‘C’, programming language but you are free to use ‘C++’ if you are more comfortable with the latter. However, in both cases you should use the GNU tool-chain to build the program. CPUs can clearly be very complex devices, hence you will not be expected to build a fully compliant implementation. However the more complete the implementation, the higher the final grade will be. The CPU to be simulated will be a loosely based on the standard ARM architecture. You will be provided with a datasheet which will specify the nature of the device (e.g. register count, status register format etc. and the instruction set to be supported). In order for the simulation to work your program will also have to provide some virtual peripheral devices. e.g. Some virtual RAM will be required. The project has been broken down into four requirements described as follows. *Requirement 1 – Program Design (30% max) -(23/10/12).* The first requirement will be to undertake some initial design work for the product. This will require the development of a written design document, which may also include block diagrams, that defines the overall architecture of the system you intend to build. This should be a maximum of *three pages *in length. The purpose of this work is to ensure you have a clear understanding of the major tasks to be performed by your simulation program. For example you may break down a solution along the following lines – Device Initialisation Instruction fetching Instruction decoding Instruction execution Under each of these headings you could describe the major tasks to be performed for that stage. You may also need to consider how the current‘state’ of the CPU (and possibly the memory content) is to be shown. e.g. following the execution of each instruction you may decide to show the contents of the main registers and anything else that has been changed as a result of the last instruction. One key aspect you will have to consider is how the instructions will be defined and read by your simulator. The op-codes should be stored in your virtual RAM (or ROM if you decide to include such a feature). However these codes need to get into the virtual machine somehow. Initially you may want to consider hard-coding some simple instructions for testing purposes. Later you may decide to load the instructions from a file. *Requirement 2 – (30%-59%)* The second requirement of the assignment is the implementation of the basic CPU simulator. This should result in the development of a computer program which has the ability to fetch, decode and execute several of the main instructions within the provided instruction set. Including basic ALU type instructions (e.g. ADD, SUB), Some Program Counter (PC) related instructions (e.g. branching) and memory access instructions (LDR and STR). *Requirement 3 – (60%-69%)* The third requirement will be to extend requirement two so that it simulates a full implementation of the provided instruction set. You should take care to ensure that the instructions not only undertake their operation correctly, but they also carry out appropriate side effects, such as the setting of status register flags. To get to the higher bracket of the available marks you should also include the ability to count elapsed time during the simulation. To implement this feature you will need to use the instruction timing information provided in the datasheet and keep a running total of total time elapsed. *Requirement 4 – (70%+)*
项目 ID: 2580063

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