assignment for advance system

已取消 已发布的 Nov 27, 2013 货到付款
已取消 货到付款

1. An electrical system is protected by a fault detector. If a fault occurs within the system, a fault signal activates an alarm buzzer. The green light that indicates fault-free operation is switched off by the fault signal and a red light is switched on. When the fault is acknowledged by the system controller, the alarm buzzer is turned off. After the fault has been cleared, the green light is switched on and the red light is switched off. A test signal is to be provided to check the operation of the fault detector. Develop an appropriate state diagram and systematically implement your asynchronous design. Show your work to design a race-free and hazard free asynchronous design. Sketch the design.

2. Use Quartus/ModelSim or Synopsys toolset to implement the design of Problem 1 in HDL. Report your HDL code and show resulting waveforms when simulating your circuit with a few test inputs.

数字设计 Verilog / VHDL

项目ID: #5173856

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5个方案 远程项目 活跃的Dec 2, 2013

有5名威客正在参与此工作的竞标,均价$23/小时

ahmedmohamed85

Dear sir, I finished the assignment as discussed and i am waiting you to give you the files i followed the pdf you provided for race-free and hazar free design waiting you Best Regards

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kevinaw613

Inputs: fault_signal, ack_signal Outputs: alarm_buzzer, green_light, red_light According to the project description, the fault detector can have 3 states: 1. nonfault state: keep if fault_signal is false, transit 更多

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daksh112

A proposal has not yet been provided

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srikanthg33

hie, i will try to deliver the state diagram as soon as possible ...................................

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