Prachi S.

A software based GPS receivers have been Designed/developed and they are habitually implemented on PC under Windows and C language environments. Although it could be successfully track GPS signals and calculate user position in real time, the acquisition and tracking signal of GPS ‘s computational time is still enormous for totally software only GPS receiver. If supplementary signal processing is required for multipath alleviation, interference deletion, and weak signal detection etc, the FPGA/DSP based approach must be provided additional computational power is one promising solution for the advanced (Software Defined Radio (SDR)) SDR GPS receiver. In this proposed research we build-up a FPGA-based software GPS receiver using a high level design tool. We make use of a Simulink and Xilinx System Generator for the GPS receiver baseband signal processing design. The signal processing components that require huge computation, for example, correlator, C/A code generator, DCO (discriminator code loop) are designed by the Xilinx FPGA block and implemented. The performance of the designed receiver is presented in this report. Xilinx introduce system generator software which can implement the FPGA design using the Matlab Simulink. In case of using this software, although we design Simulink block without using the FPGA programming knowledge.