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$50 USD / 小时
EGYPT的国旗
cairo, egypt
$50 USD / 小时
目前这里是4:55 上午
一月 20, 2012已加入
52 推荐

Ahmed M.

@ahmedmohamed85

monthly-level-two.svg
4.9 (523条评论)
8.2
8.2
75%
75%
$50 USD / 小时
EGYPT的国旗
cairo, egypt
$50 USD / 小时
98%
工作已完成
94%
在预算内
95%
按时
19%
重复雇用率

FPGA, VHDL & Verilog Expert

10 year's experience in digital system design using VHDL and verilog for FPGA's and CPLD's both for Xilinx and Altera Chips. I also have 10 years experience in working with Xilinx Ise form version 6.2 to 14.7 and Altera Quarus 2 for VHDL , verilog, system verilog and ip in addition to experience in Vivado design tool, and HLS and digital design using zynq7000

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文件夹

6528990
2115888
2114091
2100283
2099693
2088476
6528990
2115888
2114091
2100283
2099693
2088476

评论

变更已保存
展示50+中的1-5条评论
筛选评论规则:
5.0
$150.00 USD
Very fast and delivered complete project. Easy to work with
Electronics
Verilog / VHDL
Electrical Engineering
Circuit Design
FPGA
G
的国旗 Gordi J.
@gordi2
27 天前
4.6
€6,650.00 EUR
Ahmed did a very good job
Verilog / VHDL
FPGA
用户头像
的国旗 Andrea C.
@acampera
4 个月前
5.0
€6,250.00 EUR
He really knows how to design an FPGA, Ahmed is a very good FPGA designer. recommended
Electronics
Verilog / VHDL
Electrical Engineering
FPGA
用户头像
的国旗 Andrea C.
@acampera
4 个月前
5.0
$300.00 USD
He is helpful and professional in his craft.
Electronics
Matlab and Mathematica
Verilog / VHDL
Electrical Engineering
FPGA
用户头像
的国旗 Sena P.
@senapowers
5 个月前
5.0
$150.00 USD
Ahmed was so helpful and patient with me. I will definitely work with him again. He is professional and understanding
C Programming
Electronics
Verilog / VHDL
Microcontroller
Electrical Engineering
E
Closed User
@emreas
6 个月前

经验

Verilog/VHDL/FPGA Expert

freelancer.com
1月 2012 - 现在
working since 2012 at freelancer.com

Work experiance

A & A
7月 2007 - 现在
More than 5 years working in digital system design and Developing a complete VHDL Projects for Converting old digital systems based on TTL technology into small compact unites based on FPGA's.

教育

Bachelor of Electronics Engineering

Cairo University, Egypt 2002 - 2007
(5 年)

资质

Certificate of merit

Thales Raytheon Systems
2011
This Certificate has been awarded to me for the VHDL solutions that i had provided during the work in this project.

出版物

A PCM Receiver for Decoding the Deviated Clock Frequency Data Using FPGA Based Embedded System

International Journal of Electrical, Electronics and Data Communication
PCM decommutator is an essential subsystem in any communication system to decode the received parameters. In this work, A full PCM receiver is presented. The proposed PCM receiver is designed utilizing FPGA-based embedded system through USB-UART interfacing. The designed hardware consists of four major parts; a PCM frequency detector, decommutator, shift register and USB-UART interface.

FPGA Based Waveform Generator and BIST unit for Binary Phase Coded Pulse Compression Radar

Journal of Multidisciplinary Engineering Science and Technology (JMEST)
This work represents the design and implementation of a waveform generator and BIST (Built In Self-Test) unit for pulse compression radar using FPGA (Field Programmable Gate Array). The unit is capable of generating any binary phase coded waveform and testing a radar receiver by generating an echo like signal with predefined amplitude, range and Doppler shift.

Rapid prototyping of MIMO-OFDM based on parity bit selected and permutation spreading

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
In this paper, a novel transmission scheme is developed to effectively combine permutation spreading technique with MIMO-OFDM to obtain improved bit error rate performance in the presence of frequency selective fading channels with low system complexity.

FPGA Implementation Platform for MIMO-OFDM Based on UART

Journal of Emerging Trends in Computing and Information Sciences
Most hardware designers use Simulink as a design platform because it contains many components that have hardware equivalent. In addition to that, it supports Matlab Co-simulation and hardware synthesis. Simulink is seen as a good platform for low complexity systems that do not require trimming analysis during the verification phase.

FPGA IMPLEMENTATION OF FLOATING-POINT COMPLEX MATRIX INVERSION BASED ON GAUSS-JORDAN ELIMINATION

Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference
This work presents the architecture of an optimized complex matrix inversion using GAUSS-JORDAN elimination (

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