FPGA Testbench in Verilog for SDRAM using vendor model
$30-250 USD
货到付款
Hi, I have written an SDRAM controller (for a Micron SDRAM) which does not work very well.
In the other hand, I have its model (downloaded from Micron's website).
I need someone who can write a testbench to verify my controller using Micron's model and fix my controller.
项目ID： #18698208
关于项目
有8名威客正在参与此工作的竞标，均价$318/小时
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I can do I am also doing research on. I will verify using questasim. For more details inbox me so that we can discuss in detail.
Hello! Please check my profile and reviews to know a bit about me and my work. It would be great if I could help you out. Thank you!
I have 10 years of experience in design and verification using Verilog. Please message me. Best regards.
I have completed an online certification in Verilog from IIT KGP. Although I'm a beginner. Share your module with me and I can check it out.
La interface SDRAM es analogica no se puede hacer desde RTL. Utiliza el generador que tienen tanto Xilinx como Intel ( Altera).
Hi there, I have experienced for design and verify for SDR-SDRAM controller with Micron Model. Please take a look in my profile. Thanks.
