VHDL code with test bench setup (Convolution Problem)

hello, I'm an electronics engineer and I have worked before with VHDL and FPGAs, I've worked on similar problems before too (solving mathematical problems), I would love to hear from you to discuss further in chat, hope to hear from you soon

Hello, I have taken a look at the project description and it seems to be a job for a FPGA engineer like me. I will provide you with a job simple but effective, where all specs are met. I am an Electronics and Telecommuncations Engineer, with a MSc. in Digital Design, accumulating more than 4 years experience working with VHDL and Verilog on Vivado and Quartus, the most used and well-known platforms in the sector. This makes me a perfect candidate for your project, guaranteeing you an excelente and complete job on time. Signal Processing has been my area of expertise during most part of my professional growth. Feel free to take a look at my LinkedIn and freelancer profile, and the papers attached there, to evaluate some of my previous designs. Please, let me know any question or concerns you have. I am looking forward to being part of this team!

I am having 2.8 years of experience in fpga design and i am good at VHDL coding . I am having good knowledge in using xilinx ip cores